(RP13) Cross-architectural Modelling of Power Consumption Using Neural Networks
AI/Machine Learning/Deep Learning
Performance Analysis and Optimization
TimeTuesday, June 26th8:30am - 10am
DescriptionOn the path to Exascale, goal of High Performance Computing (HPC) to achieve maximum performance, becomes a goal of achieving maximum performance under strict power constraint. Novel approaches to hardware and software co-design of modern HPC systems have to be developed to address such challenges. In this paper we present Neural Networks-based model for estimating power consumption on HPC systems from metrics obtained using hardware performance counters across three different architectures, Intel 64, IBM Power and Cavium ThunderX ARMv8. We demonstrate that our approach can provide 2 to 3 times better accuracy predictions for power consumption compared to the current state of the art. Results of our work can be used as a starting point for developing unified, cross-architectural models for predicting power consumption.