Project Poster
(PP15) Energy Efficient Computing Research at STFC Hartree Centre
Poster Author
Event Type
Project Poster
Computer Architecture
Energy consumption
HPC Centre Planning and Operations
Performance Tools
TimeTuesday, June 26th3:15pm - 3:45pm
LocationBooth N-230
DescriptionThe ever-increasing use of ICT has a significant impact on the environment, due to both Carbon emissions running cloud/data centres, PCs and embedded devices, but also the footprint during the manufacture and disposal of ICT equipment. The latter category is not only embodied emissions but also covers use of water and of exotic materials, for example.

Global figures for ICT’s operational Carbon footprint are hard to quantify. However, based on data such as the estimated rise in US-based cloud datacentres from 70 billion kW-hr (1.8% of total US energy consumption) in 2014 to 73b kW-hrs in 2020 (Zakarya et al, 2017) there is broad agreement that action needs to be taken.

To help tackle the problem, STFC Hartree Centre undertakes research in to energy efficient computing. We summarise our current situation – including recent InnovateUK-funded and H2020-funded work - and discuss the planned approach to hierarchies in measuring & monitoring and how these underlie capabilities to predict and to reduce energy consumed whether by specific CPU instructions, by a specific algorithm/implementation, by how job scheduler runs a set of jobs or by a data centre’s layout design, or by changing any of CPU, algorithm, scheduler or data centre. Our proposed research covers not only physical sciences (arts of measurement and prediction) and mathematics (statistical analysis of measurements and predictions) but also social science areas including maximising user acceptance of power capping. We aim to fund this research via UK EPRSC Fellowship and explore topics in a Royal Society Scientific Meeting.
Poster PDF