Focus Session: Pushing Digital Computing to the Limits
Event TypeFocus Session
Computer Architecture
HPC Accelerators
Post Moore’s Law Computing
TimeTuesday, June 26th8:30am - 10am
LocationPanorama 2
Description“Every few years there is a university research project that thinks they are about to overturn the tried-and-true architecture that John von Neumann and Alan Turing would recognize — and unicorns will dance and butterflies will sing.” -- so the well known consultant and founder of “Silicon Insider” Jim Turley. And so he sees the classic architectures going on with with classic CMOS-technology in somewhat smaller structures -- but much slower than before, may be with only 10 percent more performance in five years. Will that be enough for the new challenges? Challenges like deep learning where the classic digital architectures will face new competition : quantum, neuromorphic … and even analog computing.

More and more we see limits in the digital space, especially with the usual CMOS technology. 7 nm CMOS, maybe 5 nm but then? Old laws, rules and scalings like the well known from Moore or Dennard are not valid any more (or have to be very much re-interpreted). The performance of sequential computing (i.e. single thread) has hardly increased during the last 10 years, IPC – Instructions per Cycle stuck at about 5 instructions per cycle.
So where are the really new ideas for digital computing in the future? What have the big companies Intel, IBM, ARM, AMD, Nvidia, NEC, ShenWei … on their roadmap and in their quivers? New ideas not only in manufacturing but in the principal architecture?

It seems that Intel as one of the biggest players in the scene has for the general purpose CPUs only a non earthquaking looking roadmap for the next years: Cannon Lake, Ice Lake, Tiger lake, Any Lake … But Intel bought a lot of innovative companies and patents with not yet seen ideas like Transmeta’s translation technique or Softmachine’s VISC ( a kind of reverse Hyper-Threading to work with several cores at one thread). NVidia is looking for complety new memory architectures, NEC is re-establishing the idea of vector computing. And what can we expect with reconfigurable hardware (FPGAs)?

In this session we will give four representatives of the main current architecture lines -- CPU, GPU, Vector Processors and FPGA , four architects and not from marketing, the chance – not to praise their, current products -- but to give us a clue about what innovations we can expect in the next 5 to 10 years.+.