BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:Europe/Stockholm
X-LIC-LOCATION:Europe/Stockholm
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=-1SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=10;BYDAY=-1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20191206T142452Z
LOCATION:Booth N-210
DTSTART;TZID=Europe/Stockholm:20180625T162000
DTEND;TZID=Europe/Stockholm:20180625T164000
UID:isc_hpc_ISC High Performance 2018_sess204_exf143@linklings.com
SUMMARY:Gidel: Different Methodologies for Optimizing Algorithms for FPGA 
 Processing
DESCRIPTION:Exhibitor Forum\n\nGidel: Different Methodologies for Optimizi
 ng Algorithms for FPGA Processing\n\n\n\n"FPGA becomes more and more popul
 ar for high-performance and low power computing.\nThe FPGA usage have been
  delayed due to two major reasons, the development tools and the knowledge
  for how to architect and code algorithms in FPGAs. HLS and OpenCL technol
 ogies are improving and opening the door for most GPU developers to develo
 p also in FPGA. FPGA and GPU architecture and code development are based o
 n defferent concepts and it is crucial to understand the FPGA flow.  \nIn 
 this talk, Reuven Weintraub, an expert in FPGA based algorithms, will in-l
 ight the fundamental of FPGA processing that have effect of more than x10 
 in performance."\n\nPasses: Exhibition Pass
URL:https://2018.isc-program.com/presentation/?id=exf143&sess=sess204
END:VEVENT
END:VCALENDAR